Acta Scientific Computer Sciences

Literature Review Volume 4 Issue 6

Design and Synthesis of Windowed Watchdog Timer for High Speed Memory Applications

Neeraj Kumar Misra* and T Swetha

Department of Electronics and Communication Engineering, Bharat Institute of Engineering and Technology, Hyderabad, India

*Corresponding Author: Neeraj Kumar Misra, Department of Electronics and Communication Engineering, Bharat Institute of Engineering and Technology, Hyderabad, India.

Received: April 04, 2022; Published: May 25, 2022

Abstract

Because embedded systems are utilised in such a broad variety of security-related applications, it is imperative that they have an exceptionally high level of dependability in order for them to operate correctly. External watchdog timers are used in these systems so that time-related problems may be automatically handled and recovered from in the event that they arise. The bulk of the external watchdog clocks now available on the market have a limited number of activities that they can do since adjusting their timeout durations requires extra circuitry in most cases. A watchdog timer that has been developed and is suitable for use in memory-related applications such as data storage is discussed in this work. A Verilog HDL-based design was used to develop the system, and a Verilog-based simulation was used to create it using Xilinx ISE 14.7. Both of these were written in Verilog.


Keywords: Low Power VLSI; Windowed Watch Dog Timer; Memory

References

  1. Ibrahim Nagwa F., et al. “Description of Microcontroller Circuit and MikroC Program”. In Protection of Wind Turbine Generators Using Microcontroller-Based Applications. Springer, Cham (2022): 69-87.
  2. Saramud Mikhail V., et al. “Implementation of decision-making algorithms in redundant systems on FPGA”. (2022).
  3. Senthamil Selvan Dr R., et al. “A Novel Watchdog Timer for Real-Time Intensive Applications”. (2021).
  4. Sankit R Kassa., et al. “Forced stack sleep transistor (FORTRAN): A new leakage current reduction approach in CMOS based circuit designing”. Facta Universitatis, Series: Electronics and Energetics2 (2021): 259-280.
  5. Nirupma Pathak., et al. “Content Addressable Memory Design in 3D pNML for Energy-Aware Sustainable Computing”. Journal of Circuits, Systems and Computers (2022): 2250178.
  6. Imran Ullah Khan., et al. “Low Power LC-Quadrature VCO with Superior Phase Noise Performance in 0.13 µm RF-CMOS Process for Modern WLAN Application”. Circuits, Systems, and Signal Processing 41.5 (2022): 2522-2540.
  7. Neeraj Kumar Misra., et al. “Preternatural low-power reversible decoder design in 90 nm technology node”. International Journal of Scientific and Engineering Research6 (2014): 969-978.
  8. Neeraj Kumar Misra., et al. “Novel Tree Structure Based Conservative Reversible Binary Coded Decimal Adder and Sequential Circuit with Added High Testability”. Journal of Computational and Theoretical Nanoscience5 (2017): 2515-2527.

Citation

Citation: Neeraj Kumar Misra and T Swetha. “Design and Synthesis of Windowed Watchdog Timer for High Speed Memory Applications". Acta Scientific Computer Sciences 4.6 (2022): 54-58.

Copyright

Copyright: © 2022 Neeraj Kumar Misra and T Swetha. This is an open-access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.




Metrics

Acceptance rate35%
Acceptance to publication20-30 days

Indexed In




News and Events


  • Certification for Review
    Acta Scientific certifies the Editors/reviewers for their review done towards the assigned articles of the respective journals.
  • Submission Timeline for Upcoming Issue
    The last date for submission of articles for regular Issues is May 30, 2024.
  • Publication Certificate
    Authors will be issued a "Publication Certificate" as a mark of appreciation for publishing their work.
  • Best Article of the Issue
    The Editors will elect one Best Article after each issue release. The authors of this article will be provided with a certificate of "Best Article of the Issue"
  • Welcoming Article Submission
    Acta Scientific delightfully welcomes active researchers for submission of articles towards the upcoming issue of respective journals.

Contact US